74LS93 4-Bit Binary Counter Pinout, Datasheet, Equivalent & Working

In every electronic device, counters play a pivotal role. The counters offer outputs that can be employed in various devices to count pulses or generate interrupts, among other functions. Generally, counters are categorized into two: Asynchronous and Synchronous counters. Both classifications leverage flip flops for binary digit counting. The 74LS series represents a renowned group within the transistor-transistor logic (TTL) logic chip families. Characterized by its bipolar nature, the 74LS series is a low-power Schottky integrated circuit. In this article, we'll provide a comprehensive guide to 74LS93 4-bit binary counter, a number of the 74 series, including pinout, specifications, working, examples datasheet, equivalent & specifications, etc.

What is 74LS93 Binary Counter IC?

The 74LS93 is a 4-bit binary counter comprising two up-counters. This integrated circuit embodies a mode-2 up-counter alongside a mod-8 up-counter. It's versatile and suitable for mod-8 counting, dividing by 2, or dividing by 8 functions. Four JK flip flops are integrated within that respond to any given input pulse. Pulse inputs can be sourced from a microcontroller or a timer IC. Design-wise, the 74LS93 has two reset pins, two clock pins, and four output terminals. Collectively, the IC delivers a 4-bit output, counting from 0 to 15 in binary terms. This counter is compatible with diverse microcontrollers and TTL-based apparatuses. Available in various formats, including DIP and SMD, it always features 14 pins. The 74L93 binary counter is also equipped with built-in protection against high-speed terminations.

74LS93 Pinout

Pin Diagram Configuration

Pin Number	Pin Name	Description
1,2,3,6	NC	No Connection
4,5,8,9	Q0, Q1, Q2, Q3	Output pins
7	Ground	Connected to ground of the system
10	CP0	Clock Input – divide by 2
11	CP1	Clock Input – divide by 8
12,13	MR	Master Reset – Clear Input
14	Vcc	Supply voltage – 4.5V to 5.5V

74LS93 Counter IC Features

• A 4-Bit Counter Integrated Circuit

• Standard Operating Voltage: 5V

• Voltage Operating Spectrum: Between 4.5V and 5.5V

• Voltage when Output is High: 3.5V

• Voltage when Output is Low: 0.25V

• Current during High Output: -0.4mA

• Current during Low Output: 8mA

• Input clock frequency for CP0 and CP1: 32MHz and 16MHz respectively.

• Pulse width for CP0 and CP1: 15nS and 30nS respectively.

• Comes in formats like 14-pin PDIP, GDIP, and PDSO

• Clock impulses can be sourced from devices like 555 timers or any microcontroller.

• The 74LS93 counter's output is in TTL format, ensuring compatibility with various ICs and microcontroller systems.

• The IC defines its HIGH and LOW states using voltage levels.

• It can efficiently function within a temperature bracket of 0 to 70 degrees Celsius.

Note: Comprehensive technical details can be available in the 74LS90 datasheet provided at the end of this page.

74LS93 Equivalents

74HC19, 74LS192, 4516

Other Counter ICs

74LS90, CD4017, 74LS02, CD4020, CD4060, CD4022, CD4026, CD40102

How does 74LS93 Digital Counter Work?

For the 74LS93 binary counter, we'll work with two input pins, two reset pins, and four output pins. Begin by setting up the power connections, then link the first clock pin (Pin 1) to the last bit (Pin 12). The reasoning behind this connection will be explained shortly. Next, ground the reset pins. If there's a need to manage the reset differently, the reset pins' configuration will vary. Afterward, connect the second clock pin (Pin 2) to the output of a timer or another pulse generator to modify the output. The IC will then produce the output on Pins 8, 9, 11, and 12. Below is the circuit layout.

The input circuit comprises the MOD 2 counter and the MOD 8 counter. The MOD 2 counter yields only outputs of 1 and 0, toggling as the clock pulse input transitions from HIGH to LOW. Meanwhile, the MOD 8 counter integrates three JK flip flops. Each flip flop gets its clock pulse from the prior JK Flip Flop's output. The output from the MOD 2 counter feeds into the clock pulse of the MOD 8's initial JK flip flop. Each JK Flip Flop's output is regarded as an output bit, cumulatively resulting in 4 bits.

74LS93 Counter Circuit

Begin by examining the internal circuit for a clearer grasp.

Each JK flip flop can only exhibit states of 1 and 0. Whenever the preceding Flip Flop's output shifts from HIGH to LOW, every subsequent JK Flip Flop undergoes a state change. However, the initial flip flop isn't directly connected to the second, leading us to link the first clock pin (CP1) with the output of the MOD 8 counter's first flip flop. With four flip flops in sequence and each receiving the clock pulse from the preceding output, the result initiates at 0000, progresses to 1111, and then reverts to 0000 after achieving 1111 once. Each binary bit signifies a binary decimal number, and this sequence occurs consecutively. Attached is a table illustrating the correlation between each decimal and its corresponding binary decimal number.

COUNTING	OUTPUT
Q3	Q2	Q1	Q0
0	0	0	0	0
1	0	0	0	1
2	0	0	1	0
3	0	0	1	1
4	0	1	0	0
5	0	1	0	1
6	0	1	1	0
7	0	1	1	1
8	1	0	0	0
9	1	0	0	1
10	1	0	1	0
11	1	0	1	1
12	1	1	0	0
13	1	1	0	1
14	1	1	1	0
15	1	1	1	1

Furthermore, a timing diagram below presents all output signals from Q0 to Q3 at every clock signal's edge.

Where to Use 74LS93?

The 74LS93 functions as an up-counter, crafted from four JK flip-flops. Utilizing a single flip-flop, CP1 and Q0 create a mod-2 counter, while CP0, in conjunction with Q1, Q2, and Q3, using three flip-flops, establishes the mod-8 counter. Often, this IC is employed by merging mod-2 and mod-8 to produce a mod-16 up-counter. It's typically used in counting operations or designs that divide by 2, 8, or 16.

How to Use 74LS93?

Using the 74LS93 IC is simple and direct. You power the IC through the Vcc and ground pin with a +5V supply. The IC features two MR (Master reset) pins, which can be employed to pick the desired mode. As the subsequent table details, both pins should be linked to the ground (LOW) for regular functioning.

For the clock pins, CP0 and CP1, a clock pulse must be supplied to initiate counting. The IC will increment its count by one for every pulse input to these clock pins. CP1 governs the Q0 output bit, while CP0 manages Q1, Q2, and Q3 output bits. To engage all four bits, CP1's clock pulse is connected to Q0.

The peak clock frequency for CP0 and CP1 is 32MHz and 16MHz, respectively. The pulse width should be at least 15nS for CP0 and 30nS for CP1. It's typical for the clock pin to be powered by a 555 timer or similar pulse-producing circuits. The table that follows demonstrates the output bits' incremental process.

Simulating the IC's functionality can provide a comprehensive grasp of it. In this example, I've chosen mode-0 (counting mode) by grounding both MR pins. For clock pulse generation, I'm toggling a logic state manually. This results in a single pulse with each high-to-low transition. The respective simulation is depicted below.

Additionally, you can refer to the video below for an in-depth understanding of the IC.

Then, let's explore the practical utilization of the 74LS93 IC within specific circuits. We will delve into some common circuit illustrations involving this digital counter IC. 

74LS93 as a Single-Digit Counter

To construct this circuit example effectively, you'll require an equivalent of the 74LS20, which features four-input NAND gates, and a 74LS04 equipped with three NOT gates. With these components, you can assemble a single-digit counter using a BCD seven-segment display. Essentially, this decimal counter is capable of cycling from 0 to 9.

However, it's important to note that the 74LS93, being a 4-bit decade/binary counter, can accommodate 16 binary counts. Yet, the counter necessitates a reset each time the binary digits reach 9. Otherwise, the 4-bit BCD counter's output may display an unintended sequence.

To reset the single-digit counter, you'll need to implement a feedback reset circuit. Constructing such a circuit involves combinations of outputs from a NAND gate and a NOT gate.

74LS93 as a 2-Digit Counter

In this scenario, the 2-digit BCD counter is designed to exhibit values ranging from 00 to 99. It provides a logic output similar to that of the single-digit BCD counter circuit.

However, in this setup, the initial BCD 7-segment display's value increments under certain conditions. This increment occurs when the second BCD 7-segment display receives a clock reset signal.

We'll explain the signle-digit and 2-digit counter in more detail later with some examples.

74LS93 Example One

In this example, we'll employ the IC for binary counting. Begin by designing the circuit in Proteus using logic states. We plan to use a momentary action logic input for the clock signal. When introducing a clock pulse to the IC, it transitions its output to the next binary value. This sequence progresses in order.

The circuit starts with an initial state of 0000 without any pulse input. The circuit advances to the subsequent number as we alter the pulse input. This sequence repeats, cycling from 0000 to 1111 and then reverting to 0000, as long as we modify the clock pulse. This counting approach integrates seamlessly with any TTL Device or Microcontroller and is straightforward to execute.

74LS93 Single Digit Counter Example

In this example, we've employed two 74LS20 units (4-input NAND gates) and three NOT gates from the 74LS04 series to craft a decimal counter paired with a BCD seven-segment display. This setup allows us to count from zero up to nine. Notably, the 74LS93 is a 4-bit counter capable of counting 0-16 in binary terms. Ideally, we could deploy two seven-segment displays to represent these counter values.

However, in this scenario, we've incorporated just one 7-segment display. This limitation means we need to refresh the counter's states once it hits the binary value of 9. Failing to do so might result in the BCD seven-segment displaying unpredictable or inconsistent figures. To circumvent this, the counter reverts its states immediately after tallying to nine. We've orchestrated a feedback reset circuitry using both NOT and NAND gates. This architecture ensures the 74LS93 counter is reset when its count transitions from 0000 to 1010.

• Two NOT gates are interfaced with outputs QA and QC, while QB and QD are directly tethered to the NAND gate's input.

• The NOT gates' outputs are also linked to two other NAND gate inputs.

• The NAND gate will produce a high output only when all its logic inputs register as zero. Thus, upon hitting the 1010 state, the NOT gates will reverse the signals from QA and QC.

• At the 1010 state, we achieve a high output. This is then inverted by the 74LS04, producing a reset command for the 74LS93 binary counter.

• Following this reset, the counter re-initiates its tally from zero.

74LS93 Based 2-Digit Decimal Counter Example

In this 2 digit decimal counter, we've crafted a mechanism that counts or showcases numbers ranging from 00 to 99. The foundational logic applied to this two-digit counter mirrors what was used in our previous example. Yet, in this case, the initial BCD seven-segment display advances its values based on the reset signal from the subsequent seven-segment display. Simply put, the first display's clock signal is driven by the reset signal of the second display.

Proteus Simulation

74LS93 Binary Counter Applications

• Facilitates the generation of extended timing durations.

• Acts as a stable frequency divider or counting mechanism.

• Relevant for tasks requiring precise timing.

• Suitable for projects where there's a preference to sidestep microcontrollers.

• Efficient as a pulse counter or a frequency partitioning tool.

• Displays numerals on seven-segment displays.

• Aids in establishing long-duration intervals.

• Ideal for crafting stable counter circuits or frequency dividers using the 74LS93.

• Compatible with applications that have specific timing needs.

74LS93 Datasheet

Download 74LS93 datasheet PDF here.

Conclusion

In summary, the 74LS93 is an integrated circuit designed for digital counting. It boasts four JK flip flops, facilitating changes between LOW and HIGH clock signals and reversals. These shifts lead to the creation of clock beats observable on a BCD 7-segment LED panel. You'll typically find this module in digital time devices and various timing setups.

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